;
; MODULE:         sys_vectors.s
; MAINTAINER:     Ivan Griffin
; CREATION DATE:  14 February 2000
; DESCRIPTION:    initial system exception vectors for ARM AEB-1
;
; SOURCE CONTROL: $Id: sys_vctr.s,v 1.9 2009/10/20 03:04:37 tianwq Exp $
;
; REVISION HISTORY:
;    25.Apr.2000         IG      Initial Version
;
; LICENSE:
;     This source code is copyright (c) 2000-2004 Ceva Inc.,
;     All rights reserved.
;
; Module:      sys_vctrs.s
; Maintainer: James.Chen
; Creation Date: 18 October 2007
; Description:   initial system exception vectors for ARM
; Revision History:
;     18 October 2007
;
; License:
;     This source code is copyright (c) 2007-2008 RDA Inc.,
;     All rights reserved.

    AREA SYS_Vect_Table, CODE, READONLY 

    IMPORT SYSirq_IRQ_Handler
    IMPORT SYSirq_FIQ_Handler
    IMPORT SYSboot_Warm_Startup
    IMPORT RDA_IRQ_ENTRY
    IMPORT RDA_FIQ_ENTRY
    EXPORT SYS_Vector_Init_Block

    ENTRY
SYS_Vector_Init_Block
    LDR PC, _Reset_Addr
    LDR PC, _Undefined_Addr
    LDR PC, _SWI_Addr
    LDR PC, _Prefetch_Abort_Addr
    LDR PC, _Data_Abort_Addr
    NOP
    LDR PC, _IRQ_Addr
    LDR PC, _FIQ_Addr


_Reset_Addr            DCD SYSboot_Warm_Startup
_Undefined_Addr        DCD _Undefined_Handler
_SWI_Addr              DCD _SWI_Handler
_Prefetch_Abort_Addr   DCD _Prefetch_Abort_Handler
_Data_Abort_Addr       DCD _Abort_Handler
_IRQ_Addr              DCD SYSirq_IRQ_Handler
_FIQ_Addr              DCD  0

_Undefined_Handler
_SWI_Handler
_Prefetch_Abort_Handler
_Abort_Handler
    B _Abort_Handler


    END

